? semiconductor components industries, llc, 2012 august, 2012 ? rev. 6 1 publication order number: LM211/d LM211, lm311 single comparators the ability to operate from a single power supply of 5.0 v to 30 v or 15 v split supplies, as commonly used with operational amplifiers, makes the LM211/lm311 a truly versatile comparator. moreover, the inputs of the device can be isolated from system ground while the output can drive loads referenced either to ground, the v cc or the v ee supply. this flexibility makes it possible to drive dtl, rtl, ttl, or mos logic. the output can also switch voltages to 50 v at currents to 50 ma, therefore, the LM211/lm311 can be used to drive relays, lamps or solenoids. features ? these devices are pb ? free and are rohs compliant figure 1. typical comparator design configurations split power supply with offset balance single supply ground ? referred load load referred to positive supply strobe capability ? output v ee inputs v cc r l 1 2 3 4 5 6 7 8 5.0k 3.0k v cc v cc v cc v cc v cc output output output output output r l r l r l r l r l inputs inputs inputs inputs inputs v ee v ee v ee v ee v ee 2 3 2 3 2 3 2 3 2 3 4 4 4 4 4 7 8 1 input polarity is reversed when gnd pin is used as an output. 7 1 8 8 7 6 1 1.0k ttl strobe 1 7 8 load referred to negative supply 1 7 8 input polarity is reversed when gnd pin is used as an output. ? + + + + + + ? - ? ? gnd inputs v ee v cc output balance/strobe balance (top view) 1 2 3 4 8 7 6 5 pin connections + ? see detailed ordering and shipping information in the package dimensions sect ion on page 2 of this data sheet. ordering information http://onsemi.com pdip ? 8 n suffix case 626 1 8 soic ? 8 d suffix case 751 1 8 marking diagrams x = 2 or 3 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g = pb ? free package = pb ? free package 1 8 lm311an awl yywwg lmx11 alyw 1 8
LM211, lm311 http://onsemi.com 2 ordering information device package shipping ? LM211dg soic ? 8 (pb ? free) 98 units / rail LM211dr2g 2500 units / tape & reel lm311dg 98 units / rail lm311dr2g 2500 units / tape & reel lm311ng pdip ? 8 (pb ? free) 50 units / rail ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. maximum ratings (t a = +25 c, unless otherwise noted.) rating symbol LM211 lm311 unit total supply voltage v cc + ? v ee ? 36 36 vdc output to negative supply voltage v o ? v ee 50 40 vdc ground to negative supply voltage v ee 30 30 vdc input differential voltage v id 30 30 vdc input voltage (note 2) v in 15 15 vdc voltage at strobe pin ? v cc to v cc ? 5 v cc to v cc ? 5 vdc power dissipation and thermal characteristics plastic dip p d 625 mw derate above t a = +25 c r ja 5.0 mw/ c operating ambient temperature range t a ? 25 to +85 0 to +70 c operating junction temperature t j(max) +150 +150 c storage temperature range t stg ? 65 to +150 ? 65 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
LM211, lm311 http://onsemi.com 3 electrical characteristics (v cc = +15 v, v ee = ? 15 v, t a = 25 c, unless otherwise noted) note 1 characteristic symbol LM211 lm311 unit min typ max min typ max input offset voltage (note 3) v io mv r s 50 k , t a = +25 c ? 0.7 3.0 ? 2.0 7.5 r s 50 k , t low t a t high * ? ? 4.0 ? ? 10 input offset current (note 3) t a = +25 c i io ? 1.7 10 ? 1.7 50 na t low t a t high * ? ? 20 ? ? 70 input bias current t a = +25 c i ib ? 45 100 ? 45 250 na t low t a t high * ? ? 150 ? ? 300 voltage gain a v 40 200 ? 40 200 ? v/mv response time (note 4) ? 200 ? ? 200 ? ns saturation voltage v ol v v id ? 5.0 mv, i o = 50 ma, t a = 25 c ? 0.75 1.5 ? ? ? v id ? 10 mv, i o = 50 ma, t a = 25 c ? ? ? ? 0.75 1.5 v cc 4.5 v, v ee = 0, t low t a t high * v id 6.0 mv, i sink 8.0 ma ? 0.23 0.4 ? ? ? v id 10 mv, i sink 8.0 ma ? ? ? ? 0.23 0.4 strobe ?on? current (note 5) i s ? 3.0 ? ? 3.0 ? ma output leakage current v id 5.0 mv, v o = 35 v, t a = 25 c, i strobe = 3.0 ma ? 0.2 10 ? ? ? na v id 10 mv, v o = 35 v, t a = 25 c, i strobe = 3.0 ma ? ? ? ? 0.2 50 na v id 5.0 mv, v o = 35 v, t low t a t high * ? 0.1 0.5 ? ? ? a input voltage range (t low t a t high *) v icr ? 14.5 ? 14.7 to 13.8 +13.0 ? 14.5 ? 14.7 to 13.8 +13.0 v positive supply current i cc ? +2.4 +6.0 ? +2.4 +7.5 ma negative supply current i ee ? ? 1.3 ? 5.0 ? ? 1.3 ? 5.0 ma * LM211: t low = ? 25 c, t high = +85 c lm311: t low = 0 c, t high = +70 c 1. offset voltage, offset current and bias current specifications apply for a supply voltage range from a single 5.0 v supply up to 15 v supplies. 2. this rating applies for 15 v supplies. the positive input voltage limit is 30 v above the negative supply. the negative input voltage limit is equal to the negative supply voltage or 30 v below the positive supply, whichever is less. 3. the offset voltages and offset currents given are the maximum values required to drive the output within a volt of either sup ply with a 1.0 ma load. thus, these parameters define an error band and take into account the ?worst case? effects of voltage gain and input impe dance. 4. the response time specified is for a 100 mv input step with 5.0 mv overdrive. 5. do not short the strobe pin to ground; it should be current driven at 3.0 ma to 5.0 ma. figure 2. circuit schematic 8 7 1 4 v ee gnd output v cc 5.0k 200 600 3.0k 300 900 800 5.4k 1.3k 250 800 800 100 3.7k 730 340 3.7k 300 5 6 300 2 3 inputs 1.3k 1.3k 1.3k balance balance/strobe
LM211, lm311 http://onsemi.com 4 figure 3. input bias current versus temperature figure 4. input offset current versus temperature figure 5. input bias current versus differential input voltage figure 6. common mode limits versus temperature t a , temperature ( c) t a , temperature ( c) differential input voltage (v) i ib , input bias current (na) i io , input offset current (na) common mode limits (v) 140 120 100 80 40 0 140 120 100 80 40 0 60 20 -55 -25 0 25 50 75 100 125 -16 -12 -8.0 -4.0 0 4.0 8.0 12 16 5.0 4.0 3.0 2.0 1.0 0 -55 -25 0 25 50 75 100 125 -55 -25 0 25 50 75 100 125 v cc -0.5 -1.0 -1.5 0.4 0.2 v ee t a , temperature ( c) normal v cc = +15 v v ee = -15 v i ib , input bias current (na) referred to supply v oltages v cc = +15 v v ee = -15 v t a = +25 c normal pins 5 & 6 tied to v cc v cc = +15 v v ee = -15 v pins 5 & 6 tied to v cc figure 7. response time for various input overdrives figure 8. response time for various input overdrives t tlh , response time ( s) t thl , response time ( s) v in input voltage (mv) , v o , output voltage (v) v in input voltage (mv) , v o , output voltage (v) 5.0 4.0 3.0 2.0 1.0 0 0 50 100 0 0.1 0.2 0.3 0.4 0.5 0.6 5.0 4.0 3.0 2.0 1.0 0 -100 -50 0 0 0.1 0.2 0.3 0.4 0.5 0.6 5.0 mv 20 mv 2.0 mv v in +5.0v 500 v o +5.0v 500 v o v in 20 mv 5.0 mv 2.0 mv v cc = +15 v v ee = -15 v t a = +25 c v cc = +15 v v ee = -15 v t a = +25 c
LM211, lm311 http://onsemi.com 5 figure 9. response time for various input overdrives figure 10. response time for various input overdrives figure 11. output short circuit current characteristics and power dissipation figure 12. output saturation voltage versus output current t tlh , response time ( s) t thl , response time ( s) v o , output voltage (v) i o , output current (ma) v in input voltage (mv) , v o , output voltage (v ) v in input voltage (mv) , v o , output voltage (v) output short circuit current (ma) v ol , saturation voltage (v) p d , power dissipation (w) 15 10 5.0 0 -5.0 -10 -15 0 -50 -100 0 1.0 2.0 0 1.0 2.0 15 10 5.0 0 -5.0 -10 -15 0 50 100 150 125 100 75 50 25 0 0 5.0 10 15 0.90 0.75 0.60 0.45 0.30 0.15 0 0.90 0.75 0.60 0.45 0.30 0.15 0 0 8.0 16 24 32 40 48 56 t a = +25 c t a = -55 c t a = +25 c t a = +125 c 20 mv 5.0 mv 2.0 mv v in v cc v o 2.0k v ee 20 mv 5.0 mv 2.0 mv v in v cc v o 2.0k v ee power dissipation short circuit current v cc = +15 v v ee = -15 v t a = +25 c v cc = +15 v v ee = -15 v t a = +25 c figure 13. output leakage current versus temperature figure 14. power supply current versus supply voltage output leakage current (ma) power supply current (ma) t a , temperature ( c) v cc -v ee , power supply voltage (v) 100 10 1.0 0.1 0.01 25 45 65 85 105 125 3.6 3.0 2.4 1.8 1.2 0.6 0 0 5.0 10 15 20 25 30 v cc = +15 v v ee = -15 v t a = +25 c output v o = +50 v (LM211 only) positive supply - output low positive and negative power supply - output h igh
LM211, lm311 http://onsemi.com 6 8 8 figure 15. power supply current versus temperature applications information figure 16. improved method of adding hysteresis without applying positive feedback to the inputs figure 17. conventional technique for adding hysteresis supply current (ma) t a , temperature ( c) 2.2 1.8 1.4 1.0 -55 -25 0 25 50 75 100 125 positive and negative supply - output high postive supply - output low +15 v 82 3.0 k 33 k 5.0 k c1 0.002 f 6 2 r1 r2 c2 input 34 1 7 -15 v 5 4.7 k lm311 0.1 f output + - 0.1 f +15 v 3.0 k 5.0 k c1 6 3 r1 r2 c2 input 24 1 7 -15 v 5 4.7 k lm311 0.1 f output - + 0.1 f 510 k 1.0 m 100 100 3.0 2.6 v cc = +15 v v ee = -15 v figure 18. zero ? crossing detector driving cmos logic figure 19. relay driver with strobe capability v cc = +15 v 3.0 k 10 k v cc 5.0 k lm311 inputs v ee v ee = -15 v output to cmos logic balance adjust balance input gnd *d1 v cc2 v cc1 v ee v ee v cc output inputs lm311 gnd 1.0k q1 balance/strobe 2n2222 or equivalent *zener diode d1 protects the comparator from inductive kickback and voltage transients on the v cc2 supply line. ttl strobe + +
LM211, lm311 http://onsemi.com 7 techniques for avoiding oscillations in comparator applications when a high speed comparator such as the LM211 is used with high speed input signals and low source impedances, the output response will normally be fast and stable, providing the power supplies have been bypassed (with 0.1 f disc capacitors), and that the output signal is routed well away from the inputs (pins 2 and 3) and also away from pins 5 and 6. however, when the input signal is a voltage ramp or a slow sine wave, or if the signal source impedance is high (1.0 k to 100 k ), the comparator may burst into oscillation near the crossing ? point. this is due to the high gain and wide bandwidth of comparators like the LM211 series. to avoid oscillation or instability in such a usage, several precautions are recommended, as shown in figure 16. the trim pins (pins 5 and 6) act as unwanted auxiliary inputs. if these pins are not connected to a trim ? pot, they should be shorted together. if they are connected to a trim ? pot, a 0.01 f capacitor (c1) between pins 5 and 6 will minimize the susceptibility to ac coupling. a smaller capacitor is used if pin 5 is used for positive feedback as in figure 16. for the fastest response time, tie both balance pins to v cc . certain sources will produce a cleaner comparator output waveform if a 100 pf to 1000 pf capacitor (c2) is connected directly across the input pins. when the signal source is applied through a resistive network, r1, it is usually advantageous to choose r2 of the same value, both for dc and for dynamic (ac) considerations. carbon, tin ? oxide, and metal ? film resistors have all been used with good results in comparator input circuitry, but inductive wirewound resistors should be avoided. when comparator circuits use input resistors (e.g., summing resistors), their value and placement are particularly important. in all cases the body of the resistor should be close to the device or socket. in other words, there should be a very short lead length or printed ? circuit foil run between comparator and resistor to ra diate or pick up signals. the same applies to capacitors, pots , etc. for example, if r1 = 10 k , as little as 5 inches of lead between the resistors and the input pins can result in oscillations that are very hard to dampen. twisting these input leads tightly is the best alternative to placing resist ors close to the comparator. since feedback to almost any pin of a comparator can result in oscillation, the printed ? circuit layout should be engineered thoughtfully. preferably there should be a groundplane under the LM211 circuitry (e.g., one side of a double layer printed circuit board). ground, positive supply or negative supply foil should extend between the output and the inputs to act as a guard. the foil connections for the inputs should be as small and compact as possible, and should be essentially surrounded by ground foil on all sides to guard against capacitive coupling from any fast high ? level signals (such as the output). if pins 5 and 6 are not used, they should be shorted together. if they are connected to a trim ? pot, the trim ? pot should be located no more than a few inches away from the LM211, and a 0.01 f capacitor should be installed across pins 5 and 6. if this capacitor cannot be used, a shielding printed ? circuit foil may be advisable between pins 6 and 7. the power supply bypass capacitors should be located within a couple inches of the LM211. a standard procedure is to add hysteresis to a comparator to prevent oscillation, and to avoid excessive noise on the output. in the circuit of figure 17, the feedback resistor of 510 k from the output to the positive input will cause about 3.0 mv of hysteresis. however, if r2 is larger than 100 , such as 50 k , it would not be practical to simply increase the value of the positive feedback resistor proportionally above 510 k to maintain the same amount of hysteresis. when both inputs of the LM211 are connected to active signals, or if a high ? impedance signal is driving the positive input of the LM211 so that positive feedback would be disruptive, the circuit of figure 16 is ideal. the positive feedback is applied to pin 5 (one of the offset adjustment pins). this will be sufficient to cause 1.0 mv to 2.0 mv hysteresis and sharp transitions with input triangle waves from a few hz to hundreds of khz. the positive ? feedback signal across the 82 resistor swings 240 mv below the positive supply. this signal is centered around the nominal voltage at pin 5, so this feedback does not add to the offset voltage of the comparator. as much as 8.0 mv of offset voltage can be trimmed out, using the 5.0 k pot and 3.0 k resistor as shown.
LM211, lm311 http://onsemi.com 8 package dimensions pdip ? 8 n suffix case 626 ? 05 issue m 14 5 8 f note 5 d e b l a1 a e3 e a top view c seating plane 0.010 ca side view end view end view note 3 dim min nom max inches a ???? ???? 0.210 a1 0.015 ???? ???? b 0.014 0.018 0.022 c 0.008 0.010 0.014 d 0.355 0.365 0.400 d1 0.005 ???? ???? e 0.100 bsc e 0.300 0.310 0.325 l 0.115 0.130 0.150 ???? ???? 5.33 0.38 ???? ???? 0.35 0.46 0.56 0.20 0.25 0.36 9.02 9.27 10.02 0.13 ???? ???? 2.54 bsc 7.62 7.87 8.26 2.92 3.30 3.81 min nom max millimeters notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. dimension e is measured with the leads re- strained parallel at width e2. 4. dimension e1 does not include mold flash. 5. rounded corners optional. e1 0.240 0.250 0.280 6.10 6.35 7.11 e2 e3 ???? ???? 0.430 ???? ???? 10.92 0.300 bsc 7.62 bsc e1 d1 m 8x e/2 e2 c
LM211, lm311 http://onsemi.com 9 package dimensions soic ? 8 d suffix case 751 ? 07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademar ks of semiconductor components industries, llc (s cillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to an y products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of th e application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products ar e not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associ ated with such unintended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action em ployer. this literature is subject to all applicable copyrig ht laws and is not fo r resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 LM211/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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